1. Field of the Invention
This invention relates to semiconductor memories such as a dynamic random access memory (DRAM) and static random access memory (SRAM) and more particularly to semiconductor memories appropriate for driving at low voltage.
2. Description of the Related Art
Formerly, the supply voltage of a digital integrated circuit such as a semiconductor memory was generally 5 volts.
However, as the semiconductor technologies develop, miniaturization of devices advances and the integration degree of semiconductor integrated circuits increases. Thus, if the supply voltage remains 5 volts, trouble such as deterioration caused by hot carriers or the lower breakdown voltage of gate oxide films is prone to occur in miniaturized devices, and it becomes difficult to guarantee reliability. There have been strong demands among the users of such semiconductor memories for a lowering of the power consumption for low power consumption of machines on which the memories are mounted. For this reason, low supply voltages such as 3.3 and 2.7 volts have been proposed.
When the supply voltage is lowered, the threshold voltage Vth for determining the on or off state of a transistor must also be lowered accordingly. This is because if the supply voltage is lowered with Vth remaining as high as before, the transistor driving capability is lowered, leading to degraded performance such as reduced operation speed.
To attempt lowering of the supply voltage without degrading the performance of a semiconductor integrated circuit, Vth of each transistor must be lowered as described above. However, if Vth is lowered, leakage current, when the transistor is turned off, increases. The graph shown in FIG. 1 shows a characteristic of subthreshold current of a MOS transistor, which is one leakage current source vs gate voltage (subthreshold characteristic). The subthreshold characteristic means a drain current value when the gate voltage is Vth or less. In the graph, the horizontal axis is the gate voltage VGS and the vertical axis is the drain current ids. In the example, Vth is defined as the gate voltage VGS when the drain current I.sub.DS is 10.sup.-7 A. In FIG. 1, the line indicated by A is one example of the subthreshold characteristic graph of a transistor used with a semiconductor integrated circuit operating at 5 volts, the conventional supply voltage. Vth is set to 0.8 volts. On the other hand, the line indicated by B in FIG. 1 is the subthreshold characteristic graph of a transistor used with a semiconductor integrated circuit where the supply voltage is lowered to 3.3 volts, and Vth is set to 0.5 volts.
Thus, if Vth lowers, the drain current I.sub.DS at the turn off point, namely, the subthreshold current when the gate voltage VGS is 0 volts increases from 10.sup.-15 A to 10.sup.-12 A as seen in the graph. This causes the following problems to occur with a semiconductor memory:
FIG. 2 shows a circuit diagram of memory cells of a dynamic random access memory. In the dynamic random access memory, a memory cell 10 holding a storage data is made of a capacitor; one end is connected to a fixed potential, such as 1/2 Vcc or Vss (ground potential), and another end is connected via a transfer gate 12 to a bit line 14. A gate terminal of the transfer gate 12 is connected to a word line 16. Therefore, if the subthreshold current of the transfer gate 12 increases, it causes leakage current to flow, and even if the word line 16 is low, leakage current of the memory cell 10 charge to the bit line increases. Therefore, the discharge of the memory cell 10 is accelerated and the necessary refresh time cannot be satisfied.
FIG. 3 shows a circuit diagram of a memory cell of a static random access memory. In the static random access memory, a memory cell holding a data is a flip-flop 20, thus the refresh trouble as in the dynamic random access memory does not occur. However, as shown in FIG. 3, a pair of bit lines (BL and BL) are connected via transfer gates 22 to a pair of output terminals of the flip-flop 20. Thus, as Vth lowers, leakage current increases, and since load resistors 24 are high resistance, the current supply capability is low and the output potential of the flip-flop 20 lowers. When the output potential of the flip-flop 20 lowers, a probability increases rapidly that information stored in the memory cell (flip-flop 20) will be destroyed by irradiation of .alpha. particles which also occur at the normal operation mode. If an attempt is made to decrease the resistance values of the two load resistors shown in FIG. 5 compared with the former values, as a solution to this problem, power consumption in the standby mode will increase.